Principal Analog & Mixed-Signal (AMS) Design Engineer
RemoteMadrid, Community of Madrid, SpainseniorFull-time
- Posted
- today
- Source
- LinkedIn (remote, Europe)
- Field
- Engineering, Design
Skills
CommunicationLeadershipNext.js
Description
Principal AMS Design Engineer required for fabless semiconductor company developing high-speed mixed-signal and optical communication ICs for automotive and industrial markets.
Seeking an industry-leading Principal Analog & Mixed-Signal (AMS) Design Engineer to drive the definition, architecture, and end-to-end execution of next-generation analog and mixed-signal integrated circuits.
In this high-impact, technical leadership role, you will define block- and system-level architectures in advanced sub-nanometric CMOS processes, guide complex full-custom IC designs, and mentor a talented team of engineers.
You will serve as the technical authority, bridging system requirements, advanced design methodologies, and silicon-proven productization.
Tasks & responsibilities: Architectural Leadership & Specification:
- Drive the architecture and top-level specification of complex analog and mixed-signal subsystems embedded in advanced SoCs (e.g., high-performance ADCs, DACs, PLLs, high-speed data interfaces, and optoelectronic integrations).
- Advanced Design & Full-Flow Execution: Oversee and execute the end-to-end design flow (from architectural modelling and schematic capture to layout oversight and full verification at the extracted level) in sub-nanometric CMOS processes.
- Layout Strategy & Oversight: Define advanced layout guidelines, electromigration/IR-drop standards, and matching strategies for layout engineers; lead critical layout reviews for sensitive high-speed/high-precision blocks.
- Silicon Validation & Productization: Partner closely with test and product engineering teams to define comprehensive test strategies for fabricated ICs. Spearhead lab characterization data analysis, silicon debugging, and correlation with simulation results.
- System-Level Integration & Co-Verification: Collaborate with system and digital design teams to generate high-level behavioural models (e.g., Verilog-A/AMS) for top-level system evaluation and complex mixed-signal verification alongside digital processing blocks.
- Innovation & IP Generation: Lead exploratory research into novel architectures and power/area-efficient solutions for future company roadmaps, driving the generation of high-value patents.
Technical Mentorship & Leadership:
- Mentor and guide junior and senior analog designers, elevating team technical capabilities and fostering engineering excellence.
Cross-Functional & Executive Communication:
- Drive technical alignment across multidisciplinary teams, present design reviews to stakeholders, and author comprehensive technical documentation.
Technical Knowledge & Expertise:
- MSc or PhD in Electronics, Electrical, Computer Engineering or relevant field.
- Deep expertise in designing full-custom analog IP blocks in advanced sub nanometric CMOS technologies (e.g., 28nm, 16nm, FinFET nodes, or below).
- Expert-level mastery of industry-standard EDA tools (Cadence Virtuoso, Spectre, AMS Designer, Synopsys, Calibre). Comprehensive knowledge of advanced full-custom layout techniques, noise coupling mitigation, substrate noise, and mismatch management.
- Demonstrated history of driving product definition, qualification, characterization, and manufacturing hand-off.
- Strong background in mixed-signal verification methodologies (UVM-AMS, behavioral modeling).
Soft Skills:
- Technical Leadership: Demonstrated ability to lead technical teams, influence engineering decisions, and inspire peers.
- Excellent written and verbal English communication skills, with the ability to articulate complex technical concepts clearly to cross-functional teams and executive leadership.
Highly competitive salary on offer, along with hybrid, flexible hours, languages classes in English and Spanish, health insurance as well as other company benefits.
This role is open to Engineers with across Europe with an EU Visa.
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